成果報告書詳細
管理番号20120000000725
タイトル*平成22年度中間年報 省エネルギー革新技術開発事業 挑戦研究 極限CMOSの研究開発
公開日2012/6/21
報告書年度2010 - 2010
委託先名独立行政法人宇宙航空研究開発機構 国立大学法人名古屋大学
プロジェクト番号P09015
部署名省エネルギー部
和文要約和文要約等以下本編抜粋:
1. 研究開発の内容及び成果等
(1)大口径・高品質Si0.5Ge0.5 基板製造の研究(独立行政法人宇宙航空研究開発機構担当)
集積回路作製を狙いとして、現在の製造限界である直径10mm から直径30mm 以上への大型化を図るともに、基板結晶の更なる高品質化を図る。
英文要約Title: Project on Innovative Energy Saving Technology Development / Challenging Research / Research and development of ultra-high speed CMOS (FY2009-FY2011) FY2010 Annual Report
This research aims at realizing ultra-high speed and low energy consumption CMOS (Complementary Metal/Oxide/Semiconductor) devices using Si0.5Ge0.5 substrates, which breaks through limitation of silicon technology. For this purpose, we investigates large size and high quality Si0.5Ge0.5 wafer fabrication method, heteroepitaxial growth of strained Ge on the substrate, and fabrication of Ge MOS structure. In the research of large size and high quality Si0.5Ge0.5 wafer fabrication method, 30mm diameter crystal growth method was studied. Travelling Liquidus-Zone (TLZ) method which JAXA (Japan Aerospace Exploration Agency) invented has been adopted. In the vertical configuration, crystal growth was carried out at a temperature gradient of 10 K/cm and at a freezing interface temperature of about 1370K, using Si feed and Ge melt forming agent. Si0.5Ge0.5 crystals were grown and compositional uniformity was excellent: Ge concentration was 50 plus or minus 1at%. Superiority of the TLZ method for obtaining compositionally uniform crystals and applicability of the TLZ method for 30mm diameter crystals were proved. In addition, single crystal region extended about 10mm and full width at half maximum of X-ray rocking curves showed good crystallinity of grown crystals. At Nagoya University, crystalline and electrical properties of strained Ge layers grown on Si0.5Ge0.5 substrates and Si1-xGex buffer layers were investigated. X-ray diffraction two-dimensional reciprocal space mapping revealed that the mosaicity of Si0.5Ge0.5 substrates fabricated by JAXA is relatively small compared to conventional Si1-xGex buffer layers grown on Si substrates. We also examined the formation of strained Ge layers on these Si0.5Ge0.5 substrates. We observed the island growth of Ge layers on the cleaned surface of Si0.5Ge0.5 substrates. The hole mobilities of Si0.5Ge0.5 substrates at room temperature and 95K were estimated to be 100 and 2000 cm2/Vs. We also achieved the formation of strained Ge layers on Si1-xGex buffer layers on insulators. Mosaicity of strained Ge layers is found to be strongly influenced by the mosaicity of Si1-xGex buffer layers. In the next year, we will improve the crystalline quality and the mobility of strained Ge layers on Si0.5Ge0.5 substrates. For the fabrication of Ge MOS structures, we investigated the chemical bonding structure and electrical properties of PrOx/Ge nitride/Ge gate stack structures. Introduction of a GeNx layer into the PrOx/Ge interface is effective to reduce the leakage current. X-ray photoelectron spectroscopic measurement revealed that, in the case of the Pr-oxide/PrON/Ge sample, metallic Pr-Pr bonds are formed in the c-Pr2O3 film near the interface and the Pr-Pr bonds probably prevent the interfacial reaction and Ge-oxide formation.
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