成果報告書詳細
管理番号20120000000661
タイトル*平成23年度中間年報 次世代プリンテッドエレクトロニクス材料・プロセス基盤技術開発
公開日2012/7/19
報告書年度2011 - 2011
委託先名次世代プリンテッドエレクトロニクス技術研究組合
プロジェクト番号P10026
部署名電子・材料・ナノテクノロジー部
和文要約和文要約等以下本編抜粋:
研究開発項目1「印刷技術による高度フレキシブル電子基板の連続製造技術開発」
(1)標準製造ラインに係る技術開発
・プリンテッドエレクトロニクスの本格的な実用化のために要求される製造技術として、連続かつ完全転写実現のための印刷技術の検討を行った。また、高精細高速大面積均質製造実現のための、アライメント技術、高均質塗布技術の検討を行った。
英文要約Title: Development of Basic Technology for Next-generation Printed Electronics Materials and Process Technology (FY2010-FY2012) FY2011 Annual Report
Continuous printing process for manufacturing a TFT array with less defects was examined. Ink materials for fabricating a gate electrode, a gate dielectric layer, a semiconductor layer, source drain electrodes, wiring, and a sealing layer were studied to be suitable for these designed processes. Printing machines which were suitable for these processes were also designed. Using these newly developed materials and printing machines, relationship between the quality of printed materials consisting of each TFT part and the fabrication process condition was examined. Alignment techniques with high accuracy and print techniques with high uniformity for preparation of a large-area device were examined for development of a print process with high resolution, high throughput and high uniformity. As a result of testing several printing condition, a design guideline to reduce the unevenness of the prepared film thickness was obtained. Measurement technologies for high frequency characteristics of a printed TFT were studied to obtain high-speed, high-power, and low-voltage operation. In order to evaluate operation speed performance of a printed TFT array, a standard model device which gives us easy to control the device parameters of a TFT array was designed. Furthermore, an evaluation method of reliability of a printed TFT was examined. Control of the interfacial condition between an electrode and an active layer was examined to reveal the effect of carrier injection efficiency on the TFT reliability. Low temperature process was examined to reduce the process damage and increase the throughput. In order to reduce the process temperature, suitable materials for preparing an active layer, a dielectric layer and a conductive layer were designed. Especially, low temperature preparation of an active layer with high TFT performance, a soluble organic semiconductor material was newly designed. New sintering process to reduce the process temperature was also examined. As a result of these examinations, a process condition which gives damage on a film substrate was revealed. In order to improve the high frequency performance of printed circuits, preparation technique of wiring with smooth surface was examined by using nano-wire inks. Design of all-printed large-area flexible transistor integrated circuits for user-friendly human/machine interfaces was examined. By preparing a ring oscillator using pseudo-CMOS circuits, high inverter gain could be obtained.
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