成果報告書詳細
管理番号20120000000714
タイトル*平成23年度中間年報 極低電力回路・システム技術開発(グリーンITプロジェクト) 研究開発項目7 低消費電力メニーコア用アーキテクチャとコンパイラ技術
公開日2012/7/12
報告書年度2011 - 2011
委託先名国立大学法人九州大学、学校法人立命館立命館大学、国立大学法人電気通信大学、株式会社フィックスターズ、株式会社トプスシステムズ
プロジェクト番号P09003
部署名電子・材料・ナノテクノロジー部
和文要約和文要約等以下本編抜粋:
1. 研究開発の内容及び成果等
本事業では、「仮想アクセラレータ実行プラットフォームとしてのヘテロジニアス・メニーコアとプログラム開発環境」を開発する。「仮想アクセラレータ(VAM: Virtual Accelerator on Many-core)」の概念を導入し、大多数の小規模コアで構成されるメニーコアを仮想アクセラレータ実現のためのハードウェア・プラットフォームとして活用する。
英文要約Title: Ultra Low Power Circuits and System Technology Development
(Green IT Project), Research Number 7, Architecture and Compiler for
Low Power Many-Core Microprocessors (FY2010-FY2012)FY2011 Annual Report
The goal of this project is to develop a many-core architecture and compiler techniques for ultra low-energy computer systems. Integrating a number of processor cores in a single chip, so called "many-core microprocessors", is one of the promising approaches to achieve high-performance, low-power consumption. By means of exploiting thread-level / data-level parallelisms, we can expect scalable performance. Also, well balanced designs such as very simple cores make it possible to achieve low power consumption. In the 2nd year, we pressed ahead with the plan as follows.
[Many-Core Architecture] We have proposed a many-core platform architecture, called SMYLEref, for energy efficient SoCs. We also have developed a prototype system by using multiple FPGA boards. Another goal in this project is to design a domain specific many-core processor. Based on the analysis of video-mining applications, a novel architecture called SMYLEvideo has been developed. It has several features such as a scalable cluster structure, a zero-overhead message passing mechanism, and an efficient streaming execution model.
[Compiler for Many-Core Microprocessors] We have opened a part of benchmark programs which focus on 4 major target domains, life-science, network-application, finance, and visual computing. We also have developed C-to-OpenCL translator called CLTrump to support efficient parallel programming. Architecture synthesis and accelerator mapping techniques have also been proposed as a main part of our compiler. Another outcome is implementation of a right-weight runtime library for OpenCL execution environment, and our experimental results show that it can achieve 60 times fast operation in maximum compared with a conventional OpenCL system.
[Ultra Low-Voltage Many-Core Execution] Lowing supply voltage is one of the most promising ways to achieve low power consumption. In this year, we have considered an architectural technique to mitigate negative impacts of process variations. We also have proposed an efficient DCFS (dynamic core-count and frequency scaling) technique to dynamically optimize the core-counts and frequency/voltage for energy efficient executions. Our experimental results show that the proposed technique can achieve 3.7 times higher performance in maximum over a traditional 64-core parallel execution.
[High-Level / Low-Level API] We have decided several API functions based on OpenCL.
[Evaluation and Demo] Power analysis targeting an ARM microprocessor has been progressed. We also have considered the final demonstration of SMYLEvideo in order to show its energy-efficiency, high performance, and also scalability.
[Trend and Market] We have surveyed the trend of many-core environment such as OS, compiler, and software development tools. We also have investigated the market of many-core microprocessors, and summarized the challenges for future many-core projects.
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