成果報告書詳細
管理番号20120000000717
タイトル*平成23年度中間年報 ノーマリーオフコンピューティング基盤技術開発
公開日2012/7/12
報告書年度2011 - 2011
委託先名株式会社東芝、ルネサスエレクトロニクス株式会社、ローム株式会社
プロジェクト番号P11001
部署名電子・材料・ナノテクノロジー部
和文要約和文要約等以下本編抜粋:
1. 共同研究の内容及び成果等
本研究では、2つの大きな研究開発項目
(1)次世代不揮発性素子を活用した電力制御技術の開発
(2)将来の社会生活を支える新しい情報システムにおいて飛躍的なノーマリーオフ化を実現する新しいコンピューティング技術の検討において、以下の研究項目を実施している。
英文要約Title: Development of Normally-off Computing Technology (FY2011-FY2015) FY2011 Annual Report (Toshiba Corporation, Renesas Electoronics Corporation, Rohm Co., Ltd)
This project is going to develop as following,
(1) Power control technology to utilize the next generation non-volatile element.
(1)-1 Technology for low power portable information terminal with high speed, low non-volatile memory system. (Toshiba Corporation)
(1)-1-1 Development of the high speed and low power non-volatile RAM: The MTJ design for the high speed and low current switching MRAM were clarified. A magnetic thin film for the MTJ was investigated. Toshiba successfully achieved our 1st target of the switching time and switching current. As a high speed nonvolatile RAM using MTJ device, two new cell structures were proposed and the cell designs were completed.
(1)-1-2 Development of high speed and low power nonvolatile cache memory circuit and system: Toshiba designed a small interface of stacked cache memory on the processor through micro bumps.
(1)-1-3 Development of memory system for normally off computing utilizing high speed nonvolatile memory: Toshiba built an environment for tracing information of system usage and access to L2 cache memory in two kinds of simulation tools.
(1)-2 Technology for low power sensor networks in smart city (Renesas Electronics Corporation)  Study on elementary components of sensor networks in smart city has been done. A preliminary specification of the Noff evaluation board has been defined with Ritsumeikan University. A case study of real sensor network applications has been completed and the technical issues have been extracted with Future University Hakodate.
(1)-3 Ultra low-power wearable biosignal sensor networks for healthcare applications (Rohm Co., Ltd)
(1)-3-1 Shadow memory architecture with FeRAM: Basic system architecture for biosignal sensor node was developed. Several basic building blocks has been designed and fabricated in 130nm process. A low voltage ferroelectric capacitor is evaluated to reduce the supply voltage of FeRAM.
(1)-3-2 Specific VLSI architecture for biosignal processing: The power management algorithm for the sensor front-end of Electrocardiogram (ECG) was produced. By using the duration and variation of R-waves in the ECG, the active time of sensor front-end can be reduced effectively.
(1)-3-3 Biosignal processing algorithm for periodical wake-up systems: A modified biosignal processing algorithm, which can be adopted in the periodical wake-up environment, has been developed. The specs for LSI implementation of proposed algorithm has been determined.
(2) Development new computing technology to realize a normally-off operation in new information systems.
(2)-1 Research and development on platform for Normally-off evaluation basis (Renesas Electronics Corporation)  Renesas is going to develop a Normally-off actual equipment evaluation environment and a Normally-off evaluation simulation environment. Study on elemental configuration of Normally-off architecture has been examined for the actual equipment evaluation environment. The examination of basic policy to construct Normally-off evaluation simulation environment has been done.
(2)-2 Research and development of memory system for normally off computing utilizing high speed nonvolatile memory. (Toshiba Corporation)  Toshiba built an environment for tracing usages of processor which has L2 cache memory in a simulation tool. Our extended simulation tool enabled any specifications of nonvolatile cache memory to simulate benchmark software.
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