成果報告書詳細
管理番号20130000000778
タイトル*平成24年度中間年報 低炭素社会を実現する新材料パワー半導体プロジェクト
公開日2013/10/25
報告書年度2012 - 2012
委託先名技術研究組合次世代パワーエレクトロニクス研究開発機構
プロジェクト番号P10022
部署名電子・材料・ナノテクノロジー部
和文要約
英文要約Title: Novel Semiconductor Power Electronics Project Realizing Low Carbon Emission Society (FY2010-2013) FY2012 Annual Report

High quality and 6" diameter SiC crystal growth; In the sublimation growth method, the 6" diameter RAF seed producing technology for preventing the cracking of ingot was developed, and the 6" diameter crystal with the dislocation density of 2-3xE3/cm2, the world highest quality was achieved. In the gas supplying growth method, the growth was stabilized by optimizing the furnace structure and the 3" diameter 12mm thick 4H-SiC single crystal was achieved. The growth rate was shown to reach 1.44mm/h five times faster than conventional. In the solution growth method, the controlling technology of the super-saturation level and the growth-temperature was developed, and the 4H-SiC single crystal of 4mm thick was realized.
Development of processing technology of 6" diameter SiC wafer; In the ingot cutting, using the developed multi-wire cutting machine with high speed wire sending, the four times faster cutting with the 1/2 warp of conventional was achieved. In the subsequent processes, the mirror surface by the high rigidity grinding, the flat surface by two sided wrapping and the extremely flat surface of Rms<0.1nm without scratches were obtained. It was verified to complete the 3" processes from cutting to CMP within 12h when the above mentioned technologies were properly used.
SiC epitaxial film growth technology development; For both surfaces of Si and C, using the configuration of contacting two 3" wafers, the aimed uniformity of film thickness and impurity concentration and the low level of surface defect densities were achieved. For the real 6" diameter wafers, the verification schedule was brought forward and the aimed uniformity was also achieved. The 50um thick epitaxial film was successfully deposited on 3" diameter wafers with growth rate >100um/h and revealed the aimed level of residual carrier concentration <3xE14/cm3 and the surface defect density <3.4/cm2. The newly designed 4" proof reactor was introduced.
High voltage switching device technology; The planer MOSFET using C-plane and JFET resistance reducing structure was made and evaluated. As a result, the reduction of the on-state resistance was confirmed and the withstand voltage >3.3kV was achieved. The 3kV class full SiC power-module using the SiC-MOSFET and SiC-SBD was made and the good switching performance was realized and the basic data for designing the MVA-class low dissipating electric power transformer was collected.
Evaluation technology development as common basic technology; The integrated evaluation platform for evaluating the correlation of surface defects and electric characteristics was constructed. The correlation data were accumulated.
Searching activity of application field of SiC technology; The technology bench marks were updated to confirm our target. For the application strategy, the field-investigation of renewable energies, EV/HEV and train were done. Based on the investigation results, the examination of specification was begun.
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