成果報告書詳細
管理番号20130000001011
タイトル*平成24年度中間年報 ノーマリーオフコンピューティング基盤技術開発
公開日2013/10/22
報告書年度2012 - 2012
委託先名株式会社東芝 ルネサスエレクトロニクス株式会社 ローム株式会社
プロジェクト番号P11001
部署名電子・材料・ナノテクノロジー部
和文要約
英文要約Title: Development of Normally-off Computing Technology (FY2011-FY2015) FY2012 Annual Report (Toshiba Corporation, Renesas Electoronics Corporation, Rohm Co., Ltd, Univ. of Tokyo)

This project is going to develop as following,
(1) Power control technology to utilize the next generation non-volatile element.

(1)-1 Technology for low power portable information terminal with high speed, low non-volatile memory system (Toshiba)
(1)-1-1: For low current and fast switching MTJ, the magnetic materials which show perpendicular anisotropy and low saturation magnetization were developed. And 1Mb MRAM circuits were designed and their performance were simulated and benchmarked. Advanced memory cells for the MRAM were newly designed and fabricated in 65nm CMOS technologies.
(1)-1-2: Nonvolatile cache memory circuits expect MRAM memory arrays were also designed. In addition, high bandwidth memory interface that connects to bus circuits for the processor cores. New memory hierarchy with hybrid SRAM/MRAM was designed using these components.

(1)-2 Technology for low power sensor networks in smart city (Renesas)
(1)-2-1: The Normally-off evaluation environment for a sensor newtork system was built. Study on the influence of the Noff operation to sensor's properties has been started with Ritsumeikan University.
(1)-2-2: On-demand trafic sysytem was selected as an application using developed Normally-off low power sensor network. Specification of the On-demand trafic system has been defined with Future University Hakodate.

(1)-4 Ultra low-power wearable biosignal sensor networks for healthcare applications (Rohm)
(1)-4-(1): The biosignal processor LSI is fabricated in 130 nm CMOS technology. We reduced the current consumption of the embedded FeRAM from several ten uA to 1uA by utilizing intermitted operation of the memory on LSI.
(1)-4-(2): We proposed a robust method of Instantaneous Heart Rate (IHR) detection from noisy electrocardiogram (ECG) signals.
(1)-4-(3) Low-voltage devices: We identified that a voltage shift of the ferroelectric hysteresis loop is important parameter. The voltage shift is strongly affected by thermal annealing before top electrode formation, and we optimized the annealing condition and achieved the 0.9V operation capacitors.

(2) Research on computing to realize effectively normally-off operation for sustaining future social life
(2)-1 (Renesas)
Renesas carried out trial manufacture and evaluation of the actual equipment evaluation board, and got the aim that 1/10 lower power consumption than present system could achieve ideally.
(2)-2 (Toshiba)
Benchmark platform for ultra-high speed nonvolatile RAM based memory used for mobile processors was developed. Based on these, SRAM/MRAM-hybrid cache memory systems were evaluated during running real applications. Also, other hybrid using DRAM/MRAM cache memory systems was also developed with advanced protocol to select DRAM or MRAM effectively.
(2)-3 (Univ. of Tokyo, Renesas, Toshiba, Rohm ) Optimization of Normally-Off Computing: We investigated low-power system architecture which adopts non-volatile memory at each memory including flip-flops, cache memory, and RAM.. We made preliminary evaluations on the effectiveness using real applications. Evaluation Methodology of Normally-Off Computing: We developed general power model of the proposed system architecture. As the model is very general, it can be applied to other system architectures with new non-volatile memory.
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