成果報告書詳細
管理番号20140000000783
タイトル*平成25年度中間年報 超低消費電力型光エレクトロニクス実装システム技術開発
公開日2015/1/31
報告書年度2013 - 2013
委託先名技術研究組合光電子融合基盤技術研究所
プロジェクト番号P13004
部署名電子・材料・ナノテクノロジー部
和文要約
英文要約Title: Photonics Electronics Convergence Technology for Power-Reducing Jisso System Project (FY2013-FY2017) FY2013 Annual Report
Key Technologies of Photonics Electronics Convergence Device
a) Photonics and Electronics Jisso Technologies: First trial of Optical I/O core with LD, optical pins and driver/receiver IC mounted on a Si -photonics chip was completed. The optical I/O cores were evaluated up to 25Gbps transmission. Low-power CMOS- ICs were also designed. b ) Photonics and Electronics Integrated Device Technologies: Modulator array and PD array were developed for parallel type optical I/O cores. Wavelength-selectable lasers, broad wavelength band PDs and wavelength Mux/Demux circuit were developed for WDM type optical I/O core.
c) Photonics and Electronics Interface Technologies: Initial design results of interface technology among routers and servers, and spectrum shaping technologies for data center communication were integrated into DSP logical core.
d) Photonics and Electronics Circuit Design Technologies: Integrated design environment for the photonics-electronics convergence packaging system was advanced. Device simulator was connected to the electromagnetic field simulator by the FDTD method.
e) Innovative Device Technologies: Highest temperature operation of p-doped InAs/GaAs quantum-dot lasers on silicon up to 110℃ was achieved. A surface-illuminated MSM (Metal-Semiconductor-Metal) Ge detector with a reduced dark current (<100 nA) was demonstrated. Other important achievements on optical modulation and photonic wiring in nanoscale, hybrid photonic devices and their control were made.
Application Technologies of Photonics Electronics Convergence Jisso System
a) Optical interconnect technologies between CPUs and Memories: The 25Gbps electrical signal transmission technology as CPU interfaces connecting to external optical IO devices was developed. Basic requirements for implementation of optical inter-connects between CPUs and high performance computing were clarified. Basic operation of an optical interface for storage devices and stacked NAND devices for chip type storages was achieved.
b) Active Optical Cables, connecting between CPU boards, racks: Si-photonics chips for 25Gbps AOC were developed. Several cooling method for optical and electrical devices in AOC-shell was evaluated.
c) Digital coherent transceiver for networks between data centers:High frequency analogue transmission lines of an optical transceiver were designed. A prototype digital coherent CFP transceiver was fabricated.
d) Si photonics transceiver chips for passive optical network applications: A GE-PON transceiver prototype chip consisting of a spot size converter, a WDM filter and a DFB-LD chip were demonstrated.
e) International standardization: Taking part in OIF and IEEE802.3 was started to build up the human network. Our documents were incorporated to interim goal “OIF Next Generation Interconnect IA.”
ダウンロード成果報告書データベース(ユーザ登録必須)から、ダウンロードしてください。

▲トップに戻る