成果報告書詳細
管理番号20150000000564
タイトル*平成26年度中間年報 SIP(戦略的イノベーション創造プログラム) 次世代パワーエレクトロニクス SiCに関する拠点型共通基盤技術開発 SiC次世代パワーエレクトロニクスの統合的研究開発
公開日2015/8/4
報告書年度2014 - 2014
委託先名国立研究開発法人産業技術総合研究所 国立大学法人京都大学 国立大学法人大阪大学 一般財団法人電力中央研究所
プロジェクト番号P14029
部署名電子・材料・ナノテクノロジー部
和文要約
英文要約This development subject consists of 1."Next Generation SiC Wafer Technology” by innovative methods including epitaxial growth and wafer machining, 2.”Next Generation SiC Device Technology” by novel structures/processes improving low-loss and high-voltage blocking features, and 3.”Next Generation SiC Module Technology” In this fiscal year, R&D of the 3 sub-subjects mentioned above was carried out, and the following R&D results were obtained. 1. Development of Next Generation SiC Wafer Technology We started the development of the impurities control technology for 4H-SiC bulk crystal growth using the nitrogen and aluminum co-doping method by the joint research group of AIST, CRIEPI, Nagoya Univ. and Osaka Electro-Communication Univ. In the sublimation growth study, it turns out that the resistivity of 4H-SiC grown by the (N, Al) co-doping method is mainly depends on the concentration difference N-Al. We confirmed that when N-Al >3x10^19 cm-3, the resistivity could be lower than 10 mohm cm.
We also started precious analysis of the conduction mechanism in heavily doped 4H-SiC. At CRIEPI, a new gas-supply system was designed for doping control experiments using a high-temperature gas source method.
We also started the development of the epitaxial wafers for the ultrahigh voltage SiC power device by cooperative research group with AIST, CRIEPI, Kyoto Univ. and Nagoya Institute of Tech. 2. Development of Next Generation SiC Device Technology As for the new structure unipolar device, basic design of 6.5kV super-junction (SJ) structure was carried out using TCAD simulation with the benchmark of SJ-SiMOS device. A possibility of backfilling epitaxial growth of 10 um depth was shown for the fabrication of SJ structure. In order to elucidate the physics in electrical properties at the SiC/oxide interface, we built a cooperative research group with Univ. Tsukuba, AIST, Osaka Univ., Univ. Tokyo, and Tohoku Univ. We conducted dry oxidation of 4H-SiC(0001) Si-face surfaces under a wide range of oxidation temperatures (1150-1600-C). As for the bipolar device, aiming at 13-20 kV class SiC-IGBT with low RonA and switching loss, hole injection method for collector side was investigated with TCAD simulation and test element group (TEG).
3. Development of Next Generation SiC Module Technology In the field of the next generation SiC power module technology, the design and durability evaluation technologies of the high chip current density (1kA/cm2 class) power module are being focused on. The modules uses 1.2kV class SiC-MOSFETs, and are considered to be used for vehicle power converters. The design of high chip current power converters requires the following technology; 1) cooling technology of the SiC chips having high heat dissipation density, 2) high temperature packaging technology of the SiC chips, 3) high temperature packaging technology of the passive elements mounted nearby SiC chips. Two designs of “2 in 1” 100A class power module are proposed by considering the module operating conditions which are determined by the converter specifications.
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