成果報告書詳細
管理番号20150000000599
タイトル*平成26年度中間年報 SIP(戦略的イノベーション創造プログラム) 次世代パワーエレクトロニクス 将来のパワーエレクトロニクスを支える基盤研究開発 パワーデバイス実用化を可能とする革新ダイヤモンド結晶成長技術開発
公開日2015/8/4
報告書年度2014 - 2014
委託先名独立行政法人物質・材料研究機構 国立大学法人東京工業大学 独立行政法人産業技術総合研究所 コーンズテクノロジー株式会社
プロジェクト番号P14029
部署名電子・材料・ナノテクノロジー部
和文要約
英文要約Title: Cross-ministerial Strategic Innovation Promotion Program/ Next Generation Power Electronics/ Feasibility Study on the Development of Diamond Crystal Growth for Power Device Applications (FY2014-FY2015) FY2014 annual report

1. Development of high purity diamond growth and impurity doping control technologies (NIMS)
For establishing a guideline for growing high-purity diamond crystals, we evaluated crystal purity of diamond grown under our standard condition of plasma enhanced chemical vapor deposition (CVD). Secondary ion mass spectroscopy (SIMS) and low temperature cathodeluminescence (CL) measurements proved the background level of boron concentration has suppressed to be less than 1E15/cc.
2. Research on the characterization and suppression dislocation density in diamond (NIMS)
Defects in homoepitaxial diamond films grown on Ib substrate were evaluated by CL measurements. By choosing free-exciton luminescence for getting luminescence image instead of luminescence wavelength for defects, imaging of defect distribution was obtained with high spatial resolution.
3. Development of CVD reactor for diamond growth with high purity and quality (Cornes Technologies Ltd.)
As a result of discussion with NIMS, we concluded that the target purity of epitaxial layers to realize diamond power device should be less than 1E14/cc (~1 ppb) as nitrogen content in an epitaxial layer. Based on this target, specifications of leakage rate and background vacuum pressure were determined taking account for CVD diamond growth conditions.
4. Development of diamond power device processing technologies (AIST)
Submicron-scale oxide-mask was formed on diamond by the combination of electron-beam lithography and reactive-ion etching (RIE) process. By using this oxide mask combined with the improved RIE techniques, we successfully fabricated submicron-scale mesa structures (width: <0.5μm, aspect ratio of height to width: >8), which is needed for normally-off properties of diamond junction field effect transistor (FET).
5-1 Characterization of fundamental properties of diamond using pin junction structure(AIST)
(111)-oriented diamond pin-junction diodes were fabricated with the i-layer thickness of ~3μm under the present growth condition of diamond, and characterized the current-voltage properties. As a result, the rectification ratio was distributed between 1E6 and 1E10 at +-20 V.
5-2 Formation of diamond junction FET and the device characterization (Tokyo Inst. Tech.)
The submicron-scale channel junction FETs with planar structure were designed to obtain “Normally-off” operation. By using advanced device fabrication techniques developed by AIST, the junction FETs with the channel width of 0.26μm could be obtained. Moreover, we investigated a relation of dislocation and leakage current in lateral p-n junction diodes. With the good p-n interface structure, we succeeded to operate diamond junction FETs under high blocking voltage conditions. The device showed high breakdown voltages of 566 V and 608 V at RT and at 473 K, respectively.
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