成果報告書詳細
管理番号20150000000778
タイトル*平成26年度中間年報 ノーマリーオフコンピューティング基盤技術開発
公開日2016/3/30
報告書年度2014 - 2014
委託先名株式会社東芝 ルネサスエレクトロニクス株式会社 ローム株式会社
プロジェクト番号P11001
部署名電子・材料・ナノテクノロジー部
和文要約
英文要約Title: Development of Normally-off Computing Technology (FY2011-FY2015) FY2014 Annual Report (Toshiba Corporation, Renesas Electronics Corporation, Rohm Co., Ltd, Univ. of Tokyo)

This project is going to develop as following,
(1) Power control technology to utilize the next generation non-volatile element.
(1)-1 Technology for low power portable information terminal with high speed, low non-volatile memory system. (Toshiba Corporation)
(1)-1-1 Development of high speed and low power non-volatile RAM: In order to achieve fast and low current switching of the STT-MRAM, magnetic material having low magnetization and large perpendicular anisotropy energy has been developed. New circuit design of the cash memory has been finished and its process integration has started.
(1)-1-2 Development of high speed and low power non-volatile cache memory circuit and system: New error bit detection circuit was proposed for higher reliability of cache data. The power of MRAM ーLLC using our designed ultra-fast power gating scheme can be reduced less than 80% of conventional SRAM-LLC.
(1)-2 Technology for low power sensor networks in smart city (Renesas)
(1)-2-1: Using the Normally-off evaluation environment for sensor network system, we evaluated electrical properties of sensor nodes with Ritsumeikan University and studied the scheme of sensor and micro-controller activation for power reduction.
(1)-2-2: Using the on-demand traffic system to get system log information, we have studied the software task scheduling and prepared the software for the demonstration with Future Univ. of Hakodate.
(1)-4 Ultra low-power wearable biosignal sensor networks for healthcare applications (Rohm)
(1)-4-1: The energy consumption of the 6T-4C NVRAM in store, recall, write, and read operations are reduced respectively by 22%, 11%, 74%, and 77% by virtue of the charge sharing and pre-charge-less techniques.
(1)-4-2: The required current consumption for heart rate extraction was reduced to 6.14 uA with 1.2 V power supply.
(1)-4-3: The system module specification was decided according to the results of field test.
(2) Research on computing to realize effectively normally-off operation for sustaining future social life. (Univ. of Tokyo, Renesas, Toshiba, Rohm): Optimization of Normally-Off Computing: We investigated low-power system architecture which adopts non-volatile memory. We made preliminary evaluations on the effectiveness using real applications. Evaluation Methodology of Normally-Off Computing: We developed general power model of the proposed system architecture. As the model is very general, it can be used to explore desired property of non-volatile memory and applied to other system architectures with new non-volatile memory.
(2)-1 (Renesas): In cooperation with Univ. of Tokyo, Renesas proposed normally-off power consumption optimization technology to the on-demand traffic system of (1)-2-2.
(2)-2 (Toshiba): New cache system using nonvolatile memory was developed. Using this, power consumption is expected to be decreased. Decrease by 1/10 will be expected by further improvement of memory devices and systems.
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