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成果報告書詳細
管理番号20170000000090
タイトル*平成27年度中間年報 高性能・高信頼性太陽光発電の発電コスト低減技術開発 太陽電池セル、モジュールの共通基盤技術開発 薄型セルを用いた高信頼性・高効率モジュール製造技術開発
公開日2017/5/31
報告書年度2015 - 2015
委託先名国立研究開発法人産業技術総合研究所
プロジェクト番号P15003
部署名新エネルギー部
和文要約
英文要約Title: Development of high performance and reliable PV modules to reduce levelized cost of energy Development of common components for solar cells and modules Development of high-efficiency and high-reliability module production technology using thin crystalline Si solar cells (FY2015-2017) FY2015 Annual Report

(1) Research collaboration with private companies-----We have established fundamental technologies for developing thin a-Si/c-Si hetero junction cells for realizing the solar cells using very thin wafers sliced by a collaborating company. The value of implied Voc of more than 720 mV was obtained. In cell process technologies, atomic layer deposition (ALD) machine for surface passivation of deposited film and pico-second laser processing machine for laser ablation of passivated films were installed and fabrication conditions have been examined. We have started reliability test for realizing long-lifetime PV modules with a collaborating company. At present, the modules made by the company are examined at AIST (FREA), and the experimental data of test has been collected. (2) Development of common fundamental PV technologies-----For optimizing a back-contact (BC) cell structure, we investigated the cell and its fabrication processes. The small size BC cells were fabricated by photolithography technique to clarify the problems of pattern designing and fabrication processes. Moreover, ion-implantation-based cell fabrication process for BC cells has been also investigated. We observed 2D carrier distribution in a phosphorous-implanted emitter by scanning capacitor microscope (SCM) for the first time. The Al-BSF type cells with phosphorous-implanted emitter were fabricated in 156 mm square wafers, and the efficiency of 19.1% was obtained. We improved the accuracy of the absolute EL imaging method developed by FREA. The uncertainty of Voc obtained from this method reduced down to the range of several mV. Therefore, this method enables the realization of Voc mapping of modules. In module fabrication technique, we investigated the stress reduction by using the conducting film (CF) between thin cell (busbar) and tab wires. Test modules using thin cells with their thickness of 100 um were fabricated by CF or lead connection. From the results of EL test of the modules after the dynamic mechanical load (DML) test, it was found that the CF connection was suitable for reducing the occurrence of cracks in thin cells.
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