World’s Highest Performance Processor Memory Circuit Developed
－Power Consumption Reduced to Less than One Tenth of Conventional Solutions through Application of “Normally-off” Technology－
February 1, 2016
New Energy and Industrial Technology Development Organization (NEDO)
As part of a NEDO project, Toshiba Corporation and the University of Tokyo developed a new 4 Mbit-class spin-transfer torque magnetoresistive random access memory (STT-MRAM) circuit, which performs at an adequate speed for computer cache memory use and consumes less than a tenth of the power required to run conventional static random access memory (SRAM) circuits. The STT-MRAM circuit has the world’s best power performance of any type of memory circuit.
Toshiba Corporation and the University of Tokyo will present their research results at the International Solid-State Circuits Conference (ISSCC 2016) on February 2nd, 2016 (local time).
For more information, please contact:
NEDO Electronics, Materials Technology and Nanotechnology Department