本文へジャンプ

成果報告書詳細
管理番号20190000000379
タイトル*平成30年度中間年報 高効率・高速処理を可能とするAIチップ・次世代コンピューティングの技術開発/革新的AIエッジコンピューティング技術の開発/動的多分岐・結合トレース型AIプロセッサのエコシステム開発
公開日2019/6/25
報告書年度2018 - 2018
委託先名株式会社エヌエスアイテクス 株式会社ユーリカ 株式会社日立製作所 国立大学法人東京工業大学
プロジェクト番号P16007
部署名IoT推進部
和文要約
英文要約Title: Project for Innovative AI Chips and Next-Generation Computing Technology Development/Development of innovative AI edge computing technologies/Development of Dynamic Instance Link Processor (DILP) and its Ecosystem for AI (FY2018-FY2020) FY2018 Annual Report

1) Research and Development of DILP
We examined the framework of the Hardware/Software system architecture that includes the processor, development environment and operating system.
In particular, the hardware structure can flexibly cope with changes in the graph structure, and concurrently execute many threads while sharing hardware resources, aiming to minimize overhead due to processing branches and data branches.
We examined a processor method that can handle flexible processing by combining multiple parallel processors by software and dynamic parallelization by hardware using multiple processors.
As a result, it is expected to increase the dynamic hardware utilization efficiency from 5 to 6% with current (heterogeneous system with CPU + GPU) to 50-60% with DILP.

2) Evaluation and performance comparison of various AI processing architecture.
In order to evaluate various processing architectures, we selected core important algorithms.

3) Research and Development of Heterogeneous Compiler
We will build a compiler system that supports heterogeneous multi-core systems.
In this period, we examined how to reduce the programmer's effort for compiling and automatic optimization.
The subject extraction for that was accomplished.

4) Research and development of OS abstraction and middleware optimization technology and integrated development environment
We will conduct research and development of an OS (hypervisor) that can be executed by multi-cores with different architectures. Therefore, we conducted surveys of existing hypervisors, extraction of needs, and examination of the execution environment, and bound documentation for each.

5) Real-time space understanding, research and development of recognition algorithm
We will develop algorithms that enable real-time understanding of complex and moving objects, and real-time mapping of the surrounding space, which contributes to factory and construction site automation.
A recognition algorithm for high-speed feature extraction from multiple camera images and raw data from sensors, and an understanding algorithm for high-speed generation of 3D shapes and spatial maps of objects by integrating extracted feature points and feature quantities. In this period, we evaluated feature extraction method and bit length reduction.

6) Benchmarking tools for DILP
To determine the true practical advantage such architecture to the current and future computing architectures in the market, we will select benchmarking tools for machine learning and signal processing for DILP
As a result, we selected machine learning system and signal processing system benchmarks.
ダウンロード成果報告書データベース(ユーザ登録必須)から、ダウンロードしてください。

▲トップに戻る