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成果報告書詳細
管理番号20190000000408
タイトル*平成30年度中間年報 高効率・高速処理を可能とするAIチップ・次世代コンピューティングの技術開発 革新的AIエッジコンピューティング技術の開発 AIエッジデバイスの横断的なセキュリティ評価に必要な基盤技術の研究開発
公開日2019/6/25
報告書年度2018 - 2018
委託先名国立研究開発法人産業技術総合研究所 電子商取引安全技術研究組合 コネクテックジャパン株式会社 株式会社IIJイノベーションインスティテュート
プロジェクト番号P16007
部署名IoT推進部
和文要約
英文要約Title: Project for Innovative AI Chips and Next-Generation Computing Technology Development Development of Innovative AI Edge Computing Technologies R&D of Fundamental Technologies for Comprehensive Security Evaluation of AI Edge Devices (FY2018-FY2020) FY2018 Annual Report

In Theme 0 (R&D of security evaluation baselines for AI edge), requirements for comprehensive security evaluation for AI edge devices were examined, and they were divided into items that can be handled by existing validation/certification/accreditation schemes, and items where deeper expertise are required. While comprehensive security assessment for AI edge devices is, in general, covered by existing schemes, such as CC, CMVP/JCMVP, ISMS, EDSA and so on, it became clear that well-grounded evaluation technologies and criteria were needed to reach a consensus among stakeholders while taking latest research results into accounts.
In Theme 1 (R&D of security evaluation simulator for AI edge input/output), we have examined potential AI edge input attack models and then built simulation environment for the models. We have confirmed the operation of basic sensors, controllers and actuators, investigated the existing standards, examined the security countermeasure scenarios, and then designed a base simulator.
In Theme 2 (R&D of protection technologies for AI edge inside), both hardware and software measures are taken to protect advanced functions implemented inside AI edge devices. As measures by hardware, we have conducted fundamental research and determined steps to identify filter substrates and wiring materials that have resistance to chemical invasive analysis. For their evaluation, we have been developing an environment for reliability testing. A preliminary experiment showed that the signal-to-noise ratio can be improved by up to approximately 6 dB for high-sensitivity measurement of weak electro-magnetic signals. As measures by software, we have developed a prototype of a binary code analyzer that checks if the firmware of the target AI edge device contains malicious code such as a trojan horse or vulnerabilities that may allow cyber-attacks. Since not all vulnerabilities can be detected by static analysis of the firmware, we have performed a feasibility study on the assurance methods for control flow integrity which prevent cyber-attacks even when there are exploitable vulnerabilities.
In Theme 3 (R&D of artifact-metrics for AI edge traceability), we have developed experimental environments and the following results were obtained: An initial sample of NAM(Nano Artifact Metrics)-chip was fabricated, and the formation of 3D random nano-scale surface structure was confirmed. Three factors were identified to reduce the cost of optical image acquisition equipment. Four techniques were identified as candidates for surface mounting. Initial prototyping process for making MOS-FET on random nanostructure Si-surface was constructed.
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