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成果報告書詳細
管理番号20190000000436
タイトル*平成30年度中間年報 「高効率・高速処理を可能とするAIチップ・次世代コンピューティングの技術開発 革新的AIエッジコンピューティング技術の開発 動的再構成技術を活用した組み込みAIシステムの研究開発」
公開日2019/6/22
報告書年度2018 - 2018
委託先名ルネサスエレクトロニクス株式会社 三菱電機株式会社 SOINN株式会社 国立大学法人北海道大学
プロジェクト番号P16007
部署名IoT推進部
和文要約
英文要約Title: Project for Innovative AI Chips and Next-Generation Computing Technology Development/Development of innovative AI edge computing technologies/Research and development of embedded AI system utilizing dynamically reconfigurable processor (FY2018-FY2020) FY2018 Annual Report

(1) AI chip architecture and compiler based on dynamically reconfigurable processor (DRP) (Renesas Electronics)
We started to develop a specification and front-end design of 1st test chip, front-end design and verification of core parts in AI accelerator for Deep Neural Network (DNN), and compiler for DRP.

(2) Novel primitive architectures for DNN processing (Hokkaido University)
We've conducted researches to develop architectures of predictive low bit-width DNN processing, table lookup oriented DNNs, pulse based DNN primitive operations, and noise based DNN primitive operations. They are still in architecture study phase, and hence we will continue the work for finalizing firm architectural ideas.

(3) DNN Compaction Method for DRP-AI Chip (Mitsubishi Electric)
We decided a DNN compaction method for DRP-AI chip. The method has the future of patterning pruning positions according to the hardware architecture. The method can achieve high-performance recognition on DRP-AI chip.

(4) DNN End-point Learning Software for DRP-AI Chip (Mitsubishi Electric)
We decided a DNN end-point learning basic concept. It is required to be executable on the same chip as the DNN inference function chip in the concept. It is necessary to develop low computational learning technology and learning data compression technology to realize the requirement.

(5) Hardware for endpoint learning (Renesas Electronics)
We conducted a basic study of architecture to develop AI accelerator capable of endpoint learning.

(6) Endpoint learning system with competitive learning algorithm consideration for DRP installation (SOINN)
We summarized the following about the SOINN algorithm and considered the directionality of DRP installation.
- Characteristics of the SOINN algorithm
- Organizing the SOINN series
- Comparison with other machine learning algorithms
- Application example of SOINN algorithm
- Design and application of F-SOINN
- Examination of computational efficiency when SOINN is installed to DRP

(7) AI development tool that facilitates integration into products (Renesas Electronics)
We developed basic concepts of AI development tool and a draft of requirements document. The document describes basic specification of GUI that can be easily handled by embedded system developers and specification of interface among tools developed in activities of (1), (2) and (3). Development of some of prototype tools for AI translator has also be started.
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