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成果報告書詳細
管理番号20190000000717
タイトル*平成30年度中間年報 「戦略的イノベーション創造プログラム(SIP)/重要インフラ等におけるサイバーセキュリティの確保/(a4)IoT向けセキュリティ確認技術(IoT向けセキュリティ確認技術の研究開発)」
公開日2019/6/26
報告書年度2018 - 2018
委託先名ルネサスエレクトロニクス株式会社 電子商取引安全技術研究組合
プロジェクト番号P15011
部署名IoT推進部
和文要約
英文要約Title: Strategic Innovation Promotion Program (SIP) / Cyber-Security for Critical Infrastructures / (a4) Security Verification Technologies for IoT Systems (FY2015-2019) FY2018 Annual Report

1. Development of Secure Cryptographic Unit (SCU) for IoT System Equipment
a. Cryptographic Module
- Developed SCU/KM series specialized in reduction of power consumption (KM14), high-speed processing (KM15), tamper resistance (KM14’), and ECDSA engine prototype for middle nodes (KM21).
b. Tamper Resistant Technology
- Constructed side channel evaluation environment for cryptographic modules on SCU and evaluated the KM series.
- Conducted a laser fault injection test on the microcomputer paired with SCU.
- Designed a tamper-resistant demonstrator for side channel attacks with the backside wiring (KM21-BBM).
c. Platform
- Summarized the API specification for the software gate (SWG) corresponding to the model system (STEP2) and released the document.
- Designed to make the hardware gate (HWG), modules, and ECC engine IP on one-chip and verified the T/O.
- Documented Security Target (ST) for SCU based on the latest R&D.
d. Marketing
- Examined the interoperability strategy when multiple companies develop and market SCU, and built the SCU certification model based on ST.

2. Development of Model Systems Using SCU
- Built a surveillance camera system with SCU evaluation board and KM14, as an application demonstration example.
- Investigated the use case of PKI for IoT, which is the potential use case of SCU, and conducted interviews with some business operators.

3. Development of Countermeasures Against Hardware Trojans
- Conducted a simulation-based analysis of hardware trojan (HT) threat and a study of HT detection.
- Examined on-chip detection technology as a countermeasure for the possible threat of mounting HT around IC chip.
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